CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 756

Manufacturer Part Number

CSM9S12XDT512SLK

KIT STUDENT LEARNING 16BIT

Manufacturer

Freescale Semiconductor

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Chapter 20 S12X Debug (S12XDBGV3) Module

There is a dedicated control register for each of the state sequencer states 1 to 3 that determines if

transitions from that state are allowed, depending upon comparator matches or tag hits, and deﬁnes the

next state for the state sequencer following a match. The three debug state control registers are located at

the same address in the register address map (0x0027). Each register can be accessed using the COMRV

bits in DBGC1 to blend in the required register. The COMRV = 11 value blends in the match ﬂag register

Debug State Control Registers

Table 20-19. State Control Register Access Encoding

MC9S12XDP512 Data Sheet, Rev. 2.21

Visible State Control Register

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