CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 1270
CSM9S12XDT512SLK
Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet
1.MC9S12XD64CAA.pdf
(1348 pages)
Specifications of CSM9S12XDT512SLK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Appendix A Electrical Characteristics
The relative deviation of t
number of clock periods (N).
Defining the jitter as:
For N < 1000, the following equation is a good fit for the maximum jitter:
This is very important to notice with respect to timers, serial modules where a prescaler will eliminate the
effect of the jitter to a large extent.
1272
J(N)
nom
Figure A-5. Maximum Bus Clock Jitter Approximation
is at its maximum for one clock period, and decreases towards zero for larger
1
J N
MC9S12XDP512 Data Sheet, Rev. 2.21
=
5
max 1
J N
10
–
t
---------------------- -
N t
max
=
------- -
nom
j
1
N
N
+
j
,
2
1
–
---------------------- -
N t
t
min
20
nom
N
N
Freescale Semiconductor
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