CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 603

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16.3.1.3
Read: Anytime
Write: Anytime
Freescale Semiconductor
Address: 0x0127
INT_CFADDR[7:4]
Reset
W
Field
R
7–4
Interrupt Request Configuration Address Register (INT_CFADDR)
0
7
Interrupt Request Configuration Data Register Select Bits — These bits determine which of the 128
configuration data registers are accessible in the 8 register window at INT_CFDATA0–7. The hexadecimal
value written to this register corresponds to the upper nibble of the lower byte of the interrupt vector, i.e.,
writing 0xE0 to this register selects the configuration data register block for the 8 interrupt vector requests
starting with vector (vector base + 0x00E0) to be accessible as INT_CFDATA0–7.
Note: Writing all 0s selects non-existing configuration registers. In this case write accesses to
Figure 16-5. Interrupt Configuration Address Register (INT_CFADDR)
= Unimplemented or Reserved
INT_CFDATA0–7 will be ignored and read accesses will return all 0.
INT_CFADDR[7:4]
0
6
Table 16-5. INT_CFADDR Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
0
5
1
4
Description
0
0
3
0
0
2
Chapter 16 Interrupt (S12XINTV1)
0
0
1
0
0
0
603

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