CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 682

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 18 Memory Mapping Control (S12XMMCV3)
18.4.4
The MMC controls the address buses and the data buses that interface the S12X masters (CPU, BDMand
XGATE) with the rest of the system (master buses). In addition the MMC handles all CPU read data bus
swapping operations. All internal and external resources are connected to specific target buses (see
Figure 18-26
1. Doted blocks and lines are optional. Please refer to the Device User Guide for their availlibilities.
682
EBI
XGATE
Chip Bus Control
XBUS3
1
).
XGATE
XBUS1
FLASH
DBG
FTX
Figure 18-26. MMC Block Diagram
MC9S12XDP512 Data Sheet, Rev. 2.21
MMC “Crossbar Switch”
EETX
XBUS0
CPU
S12X0
resources
BDM
BDM
S12X1
XSRAM
XRAM
Freescale Semiconductor
FLEXRAY
IPBI
S12X2
XBUS2