CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 961

no-image

CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Port
AD0
AD1
H
P
J
1. Each cell represents one register with individual configuration bits
23.0.6
23.0.6.1
This register holds the value driven out to the pin if the pin is used as a general purpose I/O.
Writing to this register has only an effect on the pin if the pin is used as general purpose output.
When reading this address, the buffered state of the pin is returned if the associated data direction
register bit is set to “0”.
If the data direction register bits are set to logic level “1”, the contents of the data register is
returned. This is independent of any other configuration
23.0.6.2
This is a read-only register and always returns the buffered state of the pin
23.0.6.3
This register defines whether the pin is used as an input or an output.
If a peripheral module controls the pin the contents of the data direction register is ignored
(Figure
Data
yes
yes
yes
yes
yes
23-76).
Registers
Data Register
Input Register
Data Direction Register
Direction
Data
yes
yes
yes
yes
yes
Table 23-67. Register Availability per Port
Input
yes
yes
yes
Reduced
Drive
yes
yes
yes
yes
yes
Enable
Pull
yes
yes
yes
yes
yes
(Figure
Polarity
Select
yes
yes
yes
23-76).
1
Wired-OR
Mode
(Figure
Interrupt
Enable
23-76).
yes
yes
yes
Interrupt
Flag
yes
yes
yes

Related parts for CSM9S12XDT512SLK