CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 1124

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 27 512 Kbyte Flash Module (S12XFTX512K4V2)
All bits read 0 and are not writable.
27.3.2.14 RESERVED4
This register is reserved for factory testing and is not accessible.
All bits read 0 and are not writable.
27.4
27.4.1
Write operations are used to execute program, erase, erase verify, erase abort, and data compress
algorithms described in this section. The program and erase algorithms are controlled by a state machine
whose timebase, FCLK, is derived from the oscillator clock via a programmable divider. The command
register, as well as the associated address and data registers, operate as a buffer and a register (2-stage
FIFO) so that a second command along with the necessary data and address can be stored to the buffer
while the first command is still in progress. This pipelined operation allows a time optimization when
programming more than one word on a specific row in the Flash block as the high voltage generation can
be kept active in between two programming commands. The pipelined operation also allows a
simplification of command launching. Buffer empty as well as command completion are signalled by flags
in the Flash status register with corresponding interrupts generated, if enabled.
The next sections describe:
1126
Reset
Reset
1. How to write the FCLKDIV register
2. Command write sequences to program, erase, erase verify, erase abort, and data compress
3. Valid Flash commands
4. Effects resulting from illegal Flash command write sequences or aborting Flash operations
W
W
R
R
operations on the Flash memory
Functional Description
Flash Command Operations
0
0
0
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
6
6
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
0
0
5
5
Figure 27-22. RESERVED3
Figure 27-23. RESERVED4
0
0
0
0
4
4
0
0
0
0
3
3
0
0
0
0
2
2
Freescale Semiconductor
0
0
0
0
1
1
0
0
0
0
0
0