CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 641

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The following conditions must be satisfied to ensure correct operation of the RAM protection mechanism:
Freescale Semiconductor
Value stored in RAMXGU must be lower than the value stored in RAMSHL.
Value stored RAMSHL must be lower or equal than the value stored in RAMSHU.
$0F_RAMXGU_FF
$0F_RAMSHU_FF
$0F_RAMSHL_00
CPU access violation
$0F_FFFF
Interrupt Source
Table 17-21. RAM Write Protection Interrupt Vectors
Figure 17-25. RAM Write Protection Scheme
$00_0000
$00_0800
MC9S12XDP512 Data Sheet, Rev. 2.21
Shared Region
Unimplemented
XGATE RAM
Region
2K Registers
CCR Mask
I Bit
Chapter 17 Memory Mapping Control (S12XMMCV2)
Only XGATE is allowed to write
Only CPU is allowed to write
CPU and XGATE are allowed to write
Only CPU is allowed to write
AVIE in RAMWPC
Local Enable
641

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