CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 626

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 17 Memory Mapping Control (S12XMMCV2)
17.3.2.7
Read: Anytime
Write: Anytime
The EEPROM page index register allows accessing up to 256 Kbyte of EEPROM in the global memory
map by using the eight page index bits to page 1 Kbyte blocks into the EEPROM page window located in
the local CPU memory map from address $0800 to address $0BFF (see
The reset value of $FE ensures that there is a linear EEPROM space available between addresses $0800
and $0FFF out of reset.
The fixed 1K page $0C00–$0FFF of EEPROM is equivalent to page 255 (page number $FF).
626
Address: 0x0017
Reset
EP[7:0]
Field
7–0
W
R
EP7
0
EEPROM Page Index Bits 7–0 — These page index bits are used to select which of the 256 EEPROM array
pages is to be accessed in the EEPROM Page Window.
EEPROM Page Index Register (EPAGE)
1
7
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
0
1
EP6
1
6
Figure 17-13. EEPROM Page Index Register (EPAGE)
0
Figure 17-14. EPAGE Address Mapping
Table 17-12. EPAGE Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
0
EP5
1
5
Bit17
Global Address [22:0]
EPAGE Register [7:0]
Bit16
CAUTION
EP4
1
4
Description
EP3
1
3
Bit10
Address: CPU Local Address
Bit9
Figure
EP2
or BDM Local Address
1
2
Address [9:0]
1-14).
Freescale Semiconductor
EP1
1
1
Bit0
EP0
0
0