CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 265

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NEG
Operation
–RS
–RD
Performs a two’s complement on a general purpose register.
CCR Effects
Code and CPU Cycles
Freescale Semiconductor
N:
Z:
V:
C:
NEG RD, RS
NEG RD
N
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two´s complement overflow resulted from the operation; cleared otherwise.
Set if there is a carry from the bit 15 of the result; cleared otherwise
RS[15] | RD[15]
RS[15] & RD[15]
Z
RD (translates to SUB RD, R0, RS)
RD (translates to SUB RD, R0, RD)
Source Form
V
C
new
new
Address
MC9S12XDP512 Data Sheet, Rev. 2.21
Mode
TRI
TRI
Two’s Complement
0 0 0 1 1
0 0 0 1 1
Machine Code
RD
RD
0 0 0
0 0 0
Chapter 6 XGATE (S12XGATEV2)
RD
RS
NEG
0 0
0 0
Cycles
P
P
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