CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 1281

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1
2
Freescale Semiconductor
No.
10
11
12
13
Includes the following signals: ADDRx, UDS, LDS, and CSx.
Affected by EWAIT.
1
2
3
4
5
6
7
8
9
— Frequency of internal bus
— Internal cycle time
— Frequency of external bus
— External cycle time (selected by EXSTR)
— External cycle time (EXSTR+1EWAIT)
C
D
D
D
D
D
D
D
D
D
D
D
D
D
Address
Pulse width, RE
Address
Pulse width, WE
Read data setup time (if ITHRS = 0)
Read data setup time (if ITHRS = 1)
Read data hold time
Read enable access time
Write data valid to WE fall
Write data setup time
Write data hold time
Address to EWAIT fall
Address to EWAIT rise
Table A-29. Example 1b: Normal Expanded Mode Timing V
1
1
valid to RE fall
valid to WE fall
2
2
Characteristic
MC9S12XDP512 Data Sheet, Rev. 2.21
Symbol
PW
t
PW
t
t
t
t
t
t
WDWE
t
ADWE
t
ADWF
ADWR
t
cycew
ADRE
t
t
t
ACCR
DSW
DHW
t
DSR
DSR
DHR
cyce
cyc
f
f
o
i
WE
RE
D.C.
D.C.
Min
100
25
75
85
73
24
28
71
81
37
DD35
5
5
0
7
8
0
2 Stretch
Cycles
= 5.0 V (EWAITE = 1)
Appendix A Electrical Characteristics
Max
40.0
13.3
20
47
D.C.
D.C.
Min
100
125
110
106
25
98
24
28
86
62
5
5
0
7
8
0
3 Stretch
Cycles
Max
40.0
10.0
45
72
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1283

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