CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 186

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 6 XGATE (S12XGATEV2)
6.3
This section provides a detailed description of address space and registers used by the XGATE module.
The memory map for the XGATE module is given below in
is the sum of a base address and an address offset. The base address is defined at the SoC level and the
address offset is defined at the module level. Reserved registers read zero. Write accesses to the reserved
registers have no effect.
6.3.1
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
186
XGMCHID R
Reserved
Reserved
Reserved
XGMCTL
Register
XGVBR
Name
Memory Map and Register Definition
W
W
W
W
W
W
R
R
R
R
R
Register Descriptions
XGEM
15
0
= Unimplemented or Reserved
FRZM
XG
14
0
DBGM
XG
13
0
Figure 6-2. XGATE Register Summary (Sheet 1 of 3)
XGSSM
12
0
MC9S12XDP512 Data Sheet, Rev. 2.21
FACTM
11
XG
0
10
0
SWEIFM
XG
9
0
XGVBR[15:1]
XGIEM
8
0
Figure
XGE XGFRZ XGDBG XGSS
7
0
6-2.The address listed for each register
6
5
4
XGCHID[6:0]
FACT
XG
Freescale Semiconductor
3
2
0
SWEIF
XG
1
XGIE
0
0

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