CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 934

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 23 DQ256 Port Integration Module (S12XDQ256PIMV2)
This register configures the drive strength of each port S output pin as either full or reduced. If the port is
used as input this bit is ignored.
23.0.5.27 Port S Pull Device Enable Register (PERS)
Read: Anytime.
Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated, if the port is used as input or
as output in wired-OR (open drain) mode. This bit has no effect if the port is used as push-pull output. Out
of reset a pull-up device is enabled.
23.0.5.28 Port S Polarity Select Register (PPSS)
Read: Anytime.
Write: Anytime.
This register selects whether a pull-down or a pull-up device is connected to the pin.
936
RDRS[7:0]
PERS[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
PERS7
PPSS7
Reduced Drive Port S
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
Pull Device Enable Port S
0 Pull-up or pull-down device is disabled.
1 Either a pull-up or pull-down device is enabled.
1
0
7
7
PERS6
PPSS6
Figure 23-29. Port S Pull Device Enable Register (PERS)
1
0
6
6
Figure 23-30. Port S Polarity Select Register (PPSS)
Table 23-28. RDRS Field Descriptions
Table 23-29. PERS Field Descriptions
PERS5
PPSS5
MC9S12XDP512 Data Sheet, Rev. 2.21
1
0
5
5
PERS4
PPSS4
1
0
4
4
Description
Description
PERS3
PPSS3
1
0
3
3
PERS2
PPSS2
1
0
2
2
PERS1
PPSS1
Freescale Semiconductor
1
0
1
1
PERS0
PPSS0
1
0
0
0