CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 809

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Freescale Semiconductor
Port
E
Pin Name
PE[7]
PE[6]
PE[5]
PE[4]
PE[3]
PE[2]
PE[1]
PE[0]
Pin Function
and Priority
EROMCTL
XCLKS
ECLKX2
MODB
MODA
TAGLO
LSTRB
TAGHI
ECLK
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
XIRQ
GPIO
LDS
R/W
IRQ
WE
RE
Table 22-1. Pin Functions and Priorities (Sheet 2 of 7)
1
1
1
1
MC9S12XDP512 Data Sheet, Rev. 2.21
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
External clock selection input during RESET
Free-running clock output at Core Clock rate (ECLK x 2)
General-purpose I/O
MODB input during RESET
Instruction tagging low pin
Configurable for reduced input threshold
General-purpose I/O
MODA input during RESET
Read enable signal
Instruction tagging low pin
Configurable for reduced input threshold
General-purpose I/O
Free-running clock output at the Bus Clock rate or
programmable divided in normal modes
General-purpose I/O
EROMON bit control input during RESET
Low strobe bar output
Lower data strobe
General-purpose I/O
Read/write output for external bus
Write enable signal
General-purpose I/O
Maskable level- or falling edge-sensitive interrupt input
General-purpose I/O
Non-maskable level-sensitive interrupt input
General-purpose I/O
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
Description
Pin Function
after Reset
dependent
Mode
811
3

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