CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 956

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 23 DQ256 Port Integration Module (S12XDQ256PIMV2)
23.0.5.65 Port AD0 Pull Up Enable Register 1 (PER1AD0)
Read: Anytime.
Write: Anytime.
This register activates a pull-up device on the respective pin PAD[07:00] if the port is used as input. This
bit has no effect if the port is used as output. Out of reset no pull device is enabled.
23.0.5.66 Port AD1 Data Register 0 (PT0AD1)
Read: Anytime.
Write: Anytime.
This register is associated with AD1 pins PAD[23:16]. These pins can also be used as general purpose I/O.
If the data direction bits of the associated I/O pins are set to 1, a read returns the value of the port register,
otherwise the value at the pins is read.
958
RDR1AD0[7:0]
PER1AD0[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
PER1AD07
PT0AD123
0
0
7
7
Reduced Drive Port AD0 Register 1
0 Full drive strength at output.
1 Associated pin drives at about 1/6 of the full drive strength.
Pull Device Enable Port AD0 Register 1
0 Pull-up device is disabled.
1 Pull-up device is enabled.
PER1AD06
PT0AD122
Figure 23-67. Port AD0 Pull Up Enable Register 1 (PER1AD0)
0
0
6
6
Figure 23-68. Port AD1 Data Register 0 (PT0AD1)
Table 23-59. RDR1AD0 Field Descriptions
Table 23-60. PER1AD0 Field Descriptions
PER1AD05
PT0AD121
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
5
5
PER1AD04
PT0AD120
0
0
4
4
Description
Description
PER1AD03
PT0AD119
0
0
3
3
PER1AD02
PT0AD118
0
0
2
2
PER1AD01
PT0AD117
Freescale Semiconductor
0
0
1
1
PER1AD00
PT0AD116
0
0
0
0

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