CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 391

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Once concatenated mode is enabled (CONxx bits set in PWMCTL register), enabling/disabling the
corresponding 16-bit PWM channel is controlled by the low order PWMEx bit. In this case, the high order
bytes PWMEx bits have no effect and their corresponding PWM output is disabled.
In concatenated mode, writes to the 16-bit counter by using a 16-bit access or writes to either the low or
high order byte of the counter will reset the 16-bit counter. Reads of the 16-bit counter must be made by
16-bit access to maintain data coherency.
Freescale Semiconductor
Clock Source 7
Clock Source 5
Clock Source 3
Clock Source 1
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure 8-24. PWM 16-Bit Mode
PWMCNT6
PWMCNT4
PWMCNT2
PWMCNT0
High
High
High
High
Period/Duty Compare
Period/Duty Compare
Period/Duty Compare
Period/Duty Compare
PWCNT7
PWCNT5
PWCNT3
PWCNT1
Chapter 8 Pulse-Width Modulator (S12PWM8B8CV1)
Low
Low
Low
Low
PWM7
PWM5
PWM3
PWM1
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