CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 825

Manufacturer Part Number

CSM9S12XDT512SLK

KIT STUDENT LEARNING 16BIT

Manufacturer

Freescale Semiconductor

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other

modes the data source is depending on the data direction value.

Write: Anytime. In emulation modes, write operations will also be directed to the external bus.

Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other

modes the data source is depending on the data direction value.

Freescale Semiconductor

Port A — Port A pins 7–0 are associated with address outputs ADDR15 through ADDR8 respectively in

expanded modes. When this port is not used for external addresses, these pins can be used as general purpose

I/O. If the data direction bits of the associated I/O pins are set to logic level “1”, a read returns the value of the

port register, otherwise the buffered pin input state is read.

Port A Data Register (PORTA)

Port B Data Register (PORTB)

Figure 22-4. Port B Data Register (PORTB)

Figure 22-3. Port A Data Register (PORTA)

Table 22-4. PORTA Field Descriptions

MC9S12XDP512 Data Sheet, Rev. 2.21

Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)