CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 1215

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

29.4.2.2.1
The Flash module contains a 16-bit multiple-input signature register (MISR) to generate a 16-bit signature
based on selected Flash array data. The final 16-bit signature, found in the FDATA registers after the data
compress operation has completed, is based on the following logic equation which is executed on every
data compression cycle during the operation:
where MISR is the content of the internal signature register and DATA is the data to be compressed as
shown in
During the data compress operation, the following steps are executed:
Freescale Semiconductor
1. MISR is reset to 0xFFFF.
2. Initialized DATA equal to 0xFFFF is compressed into the MISR which results in the MISR
3. DATA equal to the selected Flash array data range is read and compressed into the MISR with
4. DATA equal to the selected Flash array data range is read and compressed into the MISR with
5. DATA equal to the contents of the MISR is compressed into the same MISR.
6. The contents of the MISR are written to the FDATA registers.
DATA[0]
containing 0x0001.
addresses incrementing.
addresses decrementing.
+
MISR[15:0] = Q[15:0]
+
Figure
= Exclusive-OR
>
D Q
M0
Data Compress Operation
29-25.
DATA[1]
MISR[15:0] = {MISR[14:0], ^MISR[15,4,2,1]} ^ DATA[15:0]
+
>
D Q
M1
+
DATA[2]
+
Figure 29-25. 16-Bit MISR Diagram
MC9S12XDP512 Data Sheet, Rev. 2.21
>
D Q
M2
+
DATA[3]
+
>
D Q
M3
DATA[4]
+
>
D Q
M4
Chapter 29 128 Kbyte Flash Module (S12XFTX128K1V1)
+
DATA[5]
+
>
D Q
M5
...
DATA[15]
+
>
M15
D Q
Eqn. 29-1
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