CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 549

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.3.0.8
Read: Anytime
Write: Anytime
Freescale Semiconductor
Reset
Reset
Reset
Reset
PLD[15:0]
Field
W
W
W
W
15:0
R
R
R
R
PLD15 PLD14 PLD13 PLD12 PLD11 PLD10 PLD9 PLD8 PLD7 PLD6 PLD5 PLD4 PLD3 PLD2 PLD1 PLD0
PLD15 PLD14 PLD13 PLD12 PLD11 PLD10 PLD9 PLD8 PLD7 PLD6 PLD5 PLD4 PLD3 PLD2 PLD1 PLD0
PLD15 PLD14 PLD13 PLD12 PLD11 PLD10 PLD9 PLD8 PLD7 PLD6 PLD5 PLD4 PLD3 PLD2 PLD1 PLD0
PLD15 PLD14 PLD13 PLD12 PLD11 PLD10 PLD9 PLD8 PLD7 PLD6 PLD5 PLD4 PLD3 PLD2 PLD1 PLD0
15
15
15
15
0
0
0
0
PIT Load Bits 15:0 — These bits set the 16-bit modulus down-counter load value. Writing a new value into the
PITLD register must be a 16-bit access, to ensure data consistency. It will not restart the timer. When the timer
has counted down to zero the PTF time-out flag will be set and the register value will be loaded. The PFLT bits
in the PITFLT register can be used to immediately update the count register with the new value if an immediate
load is desired.
PIT Load Register 0 to 3 (PITLD0–3)
14
14
14
14
0
0
0
0
13
13
13
13
0
0
0
0
12
12
12
12
0
0
0
0
Figure 13-11. PIT Load Register 0 (PITLD0)
Figure 13-12. PIT Load Register 1 (PITLD1)
Figure 13-13. PIT Load Register 2 (PITLD2)
Figure 13-14. PIT Load Register 3 (PITLD3)
Table 13-8. PITLD0–3 Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
11
11
11
11
0
0
0
0
10
10
10
10
0
0
0
0
0
0
0
0
9
9
9
9
Description
0
0
0
0
8
8
8
8
0
0
0
0
7
7
7
7
Chapter 13 Periodic Interrupt Timer (S12PIT24B4CV1)
0
0
0
0
6
6
6
6
0
0
0
0
5
5
5
5
0
0
0
0
4
4
4
4
0
0
0
0
3
3
3
3
0
0
0
0
2
2
2
2
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
549