CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 604

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 16 Interrupt (S12XINTV1)
16.3.1.4
The eight register window visible at addresses INT_CFDATA0–7 contains the configuration data for the
block of eight interrupt requests (out of 128) selected by the interrupt configuration address register
(INT_CFADDR) in ascending order. INT_CFDATA0 represents the interrupt configuration data register
of the vector with the lowest address in this block, while INT_CFDATA7 represents the interrupt
configuration data register of the vector with the highest address, respectively.
1
1
1
1
604
Address: 0x0128
Address: 0x0129
Address: 0x012A
Address: 0x012B
Please refer to the notes following the PRIOLVL[2:0] description below.
Please refer to the notes following the PRIOLVL[2:0] description below.
Please refer to the notes following the PRIOLVL[2:0] description below.
Please refer to the notes following the PRIOLVL[2:0] description below.
Reset
Reset
Reset
Reset
W
W
W
W
R
R
R
R
RQST
RQST
RQST
RQST
Interrupt Request Configuration Data Registers (INT_CFDATA0–7)
0
0
0
0
7
7
7
7
Figure 16-6. Interrupt Request Configuration Data Register 0 (INT_CFDATA0)
Figure 16-7. Interrupt Request Configuration Data Register 1 (INT_CFDATA1)
Figure 16-8. Interrupt Request Configuration Data Register 2 (INT_CFDATA2)
Figure 16-9. Interrupt Request Configuration Data Register 3 (INT_CFDATA3)
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
0
0
0
0
6
6
6
6
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
0
0
0
0
0
0
5
5
5
5
0
0
0
0
0
0
0
0
4
4
4
4
0
0
0
0
0
0
0
0
3
3
3
3
0
0
0
0
2
2
2
2
PRIOLVL[2:0]
PRIOLVL[2:0]
PRIOLVL[2:0]
PRIOLVL[2:0]
Freescale Semiconductor
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1