CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 250

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 6 XGATE (S12XGATEV2)
CMPL
Operation
RS.L – IMM8
Subtracts the 8 bit constant IMM8 contained in the instruction code from the low byte of the source register
RS.L using binary subtraction and updates the condition code register accordingly.
Remark: There is no equivalent operation using triadic addressing. Comparing the values of two registers
can be performed by using the subtract instruction with R0 as destination register.
CCR Effects
Code and CPU Cycles
250
N:
Z:
V:
C:
CMPL RS, #IMM8
N
Set if bit 7 of the result is set; cleared otherwise.
Set if the 8 bit result is $00; cleared otherwise.
Set if a two´s complement overflow resulted from the 8 bit operation; cleared otherwise.
RS[7] & IMM8[7] & result[7] | RS[7] & IMM8[7] & result[7]
Set if there is a carry from the Bit 7 to Bit 8 of the result; cleared otherwise.
RS[7] & IMM8[7] | RS[7] & result[7] | IMM8[7] & result[7]
Z
V
Source Form
C
NONE, only condition code flags get updated
Compare Immediate 8 bit Constant
Address
MC9S12XDP512 Data Sheet, Rev. 2.21
Mode
IMM8
1
(Low Byte)
1
0
1
0
Machine Code
RS
IMM8
CMPL
Freescale Semiconductor
Cycles
P

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