CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 541

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 13
Periodic Interrupt Timer (S12PIT24B4CV1)
13.1
The period interrupt timer (PIT) is an array of 24-bit timers that can be used to trigger peripheral modules
or raise periodic interrupts. Refer to
13.1.1
13.1.2
The PIT includes these features:
13.1.3
Refer to the SoC guide for a detailed explanation of the chip modes.
Freescale Semiconductor
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micro time bases
Four timers implemented as modulus down-counters with independent time-out periods.
Time-out periods selectable between 1 and 2
cycles with 1 <= m <= 256 and 1 <= n <= 65536.
Timers that can be enabled individually.
Four time-out interrupts.
Four time-out trigger output signals available to trigger peripheral modules.
Start of timer channels can be aligned to each other.
Run mode
This is the basic mode of operation.
Wait mode
Introduction
Glossary
Features
Modes of Operation
CCR
SoC
ISR
PIT
Periodic Interrupt Timer
Interrupt Service Routine
Condition Code Register
System on Chip
clock periods of the 16-bit timer modulus down-counters, which are generated by the 8-bit
modulus down-counters.
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure 13-1
Acronyms and Abbreviations
for a simplified block diagram.
24
bus clock cycles. Time-out equals m*n bus clock
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