CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 1204

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 29 128 Kbyte Flash Module (S12XFTX128K1V1)
29.3.2.9
The FADDRHI and FADDRLO registers are the Flash address registers.
All FADDRHI and FADDRLO bits are readable but are not writable. After an array write as part of a
command write sequence, the FADDR registers will contain the mapped MCU address written.
29.3.2.10 Flash Data Registers (FDATA)
The FDATAHI and FDATALO registers are the Flash data registers.
1206
NV[6:0]
Reset
Reset
Reset
Field
6:0
W
W
W
R
R
R
Nonvolatile Bits — The NV[6:0] bits are available as nonvolatile bits. Refer to the Device User Guide for proper
use of the NV bits.
Flash Address Registers (FADDR)
0
0
0
7
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure 29-15. Flash Address Low Register (FADDRLO)
0
Figure 29-14. Flash Address High Register (FADDRHI)
0
0
6
6
6
Figure 29-16. Flash Data High Register (FDATAHI)
Table 29-17. FCTL Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
0
5
5
5
0
0
0
4
4
4
FADDRLO
FADDRHI
FDATAHI
Description
0
0
0
3
3
3
0
0
0
2
2
2
Freescale Semiconductor
0
0
0
1
1
1
0
0
0
0
0
0

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