CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 219

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADDL
Operation
RD + $00:IMM8
Adds the content of register RD and an unsigned immediate 8 bit constant using binary addition and stores
the result in the destination register RD. This instruction must be used first for a 16 bit immediate addition
in conjunction with the ADDH instruction.
CCR Effects
Code and CPU Cycles
Freescale Semiconductor
N:
Z:
V:
C:
ADDL RD, #IMM8
N
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two´s complement overflow resulted from the 8 bit operation; cleared otherwise.
RD[15]
Set if there is a carry from the bit 15 of the result; cleared otherwise.
RD[15]
Z
V
Source Form
old
old
& RD[15]
& RD[15]
C
RD
new
new
Add Immediate 8 bit Constant
Address
MC9S12XDP512 Data Sheet, Rev. 2.21
Mode
IMM8
1
(Low Byte)
1
1
0
0
Machine Code
RD
Chapter 6 XGATE (S12XGATEV2)
IMM8
ADDL
Cycles
P
219

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