CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 657

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
18.3.2
18.3.2.1
Read: Anytime. In emulation modes read operations will return the data from the external bus. In all other
modes the data is read from this register.
Write: Anytime. In emulation modes write operations will also be directed to the external bus.
The MMCCTL0 register is used to control external bus functions, i.e., availability of chip selects.
Freescale Semiconductor
Address
Address: 0x000A PRR
1. ROMON is bit[0] of the register MMCTL1 (see
0x011D
0x011E
0x011F
Reset
1
2
W
R
CS3E, CS2E, CS1E, CS0E
Disabled: feature always inactive.
Enabled: activity is controlled by the appropriate register bit value.
RAMXGU
RAMSHU
RAMSHL
Register
Register Descriptions
Name
MMC Control Register (MMCCTL0)
Register Bit
0
0
7
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
= Unimplemented or Reserved
W
W
W
R
R
R
0
0
6
Bit 7
1
1
1
Figure 18-3. MMC Control Register (MMCCTL0)
Table 18-4. Chip Selects Function Activity
Disabled
Figure 18-2. MMC Register Summary
MC9S12XDP512 Data Sheet, Rev. 2.21
= Unimplemented or Reserved
NS
XGU6
SHU6
SHL6
0
0
5
6
Figure
1
Disabled
18-10)
CAUTION
XGU5
SHU5
SHL5
SS
5
0
0
4
Enabled
XGU4
SHU4
SHL4
NX
4
CS3E
Chip Modes
0
3
2
Chapter 18 Memory Mapping Control (S12XMMCV3)
XGU3
SHU3
SHL3
Disabled
3
ES
CS2E
0
2
XGU2
SHU2
SHL2
Enabled
2
EX
CS1E
0
1
XGU1
SHU1
SHL1
1
Enabled
ST
ROMON
CS0E
XGU0
SHU0
SHL0
Bit 0
0
657
1

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