CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 845

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
22.3.2.28 Port S Polarity Select Register (PPSS)
Read: Anytime.
Write: Anytime.
This register selects whether a pull-down or a pull-up device is connected to the pin.
22.3.2.29 Port S Wired-OR Mode Register (WOMS)
Read: Anytime.
Write: Anytime.
This register configures the output pins as wired-OR. If enabled the output is driven active low only
(open-drain). A logic level of “1” is not driven. It applies also to the SPI and SCI outputs and allows a
multipoint connection of several serial modules. These bits have no influence on pins used as inputs.
Freescale Semiconductor
WOMS[7:0]
PPSS[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
WOMS7
PPSS7
Pull Select Port S
0 A pull-up device is connected to the associated port S pin, if enabled by the associated bit in register PERS
1 A pull-down device is connected to the associated port S pin, if enabled by the associated bit in register PERS
Wired-OR Mode Port S
0 Output buffers operate as push-pull outputs.
1 Output buffers operate as open-drain outputs.
0
0
7
7
and if the port is used as input or as wired-OR output.
and if the port is used as input.
WOMS6
PPSS6
Figure 22-31. Port S Wired-OR Mode Register (WOMS)
0
0
6
6
Figure 22-30. Port S Polarity Select Register (PPSS)
Table 22-31. WOMS Field Descriptions
Table 22-30. PPSS Field Descriptions
WOMS5
PPSS5
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
5
5
WOMS4
PPSS4
0
0
4
4
Description
Description
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
WOMS3
PPSS3
0
0
3
3
WOMS2
PPSS2
0
0
2
2
WOMS1
PPSS1
0
0
1
1
WOMS0
PPSS0
0
0
0
0
847

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