R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 92

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 2 CPU
2.8
The H8SX CPU supports the 11 addressing modes listed in table 2.12. Each instruction uses a
subset of these addressing modes.
Bit manipulation instructions use register direct, register indirect, or absolute addressing mode to
specify an operand, and register direct (BSET, BCLR, BNOT, and BTST instructions) or
immediate (3-bit) addressing mode to specify a bit number in the operand.
Table 2.12 Addressing Modes
Rev. 3.00 Mar. 14, 2006 Page 54 of 804
REJ09B0104-0300
No. Addressing Mode
1
2
3
4
5
6
7
8
9
10
11
Register direct
Register indirect
Register indirect with displacement
Index register indirect with displacement
Register indirect with post-increment
Register indirect with pre-decrement
Register indirect with pre-increment
Register indirect with post-decrement
Absolute address
Immediate
Program-counter relative
Program-counter relative with index register
Memory indirect
Extended memory indirect
Addressing Modes and Effective Address Calculation
Symbol
Rn
@ERn
@(d:2,ERn)/@(d:16,ERn)/@(d:32,ERn)
@(d:16, RnL.B)/@(d:16,Rn.W)/@(d:16,ERn.L)
@(d:32, RnL.B)/@(d:32,Rn.W)/@(d:32,ERn.L)
@ERn+
@−ERn
@+ERn
@ERn−
@aa:8/@aa:16/@aa:24/@aa:32
#xx:3/#xx:4/#xx:8/#xx:16/#xx:32
@(d:8,PC)/@(d:16,PC)
@(RnL.B,PC)/@(Rn.W,PC)/@(ERn.L,PC)
@@aa:8
@@vec:7

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