R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 108

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 3 MCU Operating Modes
Rev. 3.00 Mar. 14, 2006 Page 70 of 804
REJ09B0104-0300
Bit
15, 14
13
12
11
10
9
8
7
6 to 2
1, 0
Bit Name

MACS




RAME
FLSHE


Initial
Value
All 1
0
1
0
1
0
1
0
All 0
All 1
R/W
R
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Descriptions
Reserved
These are read-only bits and cannot be modified.
MAC Saturation Operation Control
Selects either saturation operation or non-saturation
operation for the MAC instruction.
0: MAC instruction is non-saturation operation
1: MAC instruction is saturation operation
Reserved
This is a read-only bit and cannot be modified.
Reserved
This bit is always read as 0. The write value should
always be 0.
Reserved
This bit is always read as 1. The write value should
always be 1.
Reserved
This bit is always read as 0. The write value should
always be 0.
RAM Enable
Enables or disables the on-chip RAM. This bit is
initialized when the reset state is released. Do not write
0 during access to the on-chip RAM.
0: On-chip RAM disabled
1: On-chip RAM enabled
Flash Memory Control Register Enable
Controls accesses to the flash memory control
registers. Setting this bit to 1 enables to read from and
write to the flash memory control registers. Clearing this
bit to 0 disables the flash memory control registers. At
this time, the contents of the flash memory control
registers are retained. The write value should be 0
when the LSI is not the flash memory version.
0: Disables the flash memory control registers
1: Enables the flash memory control registers
Reserved
These bits are always read as 0. The write value should
always be 0.
Reserved
This bit is always read as 1. The write value should
always be 1.