R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 348

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 16-Bit Timer Pulse Unit (TPU)
(b) When TGR is an input capture register
Figure 9.17 shows an operation example in which TGRA has been designated as an input capture
register, and buffer operation has been designated for TGRA and TGRC.
Counter clearing by TGRA input capture has been set for TCNT, and both rising and falling edges
have been selected as the TIOCA pin input capture input edge.
As buffer operation has been set, when the TCNT value is stored in TGRA upon occurrence of
input capture A, the value previously stored in TGRA is simultaneously transferred to TGRC.
Rev. 3.00 Mar. 14, 2006 Page 310 of 804
REJ09B0104-0300
H'0F07
H'09FB
H'0532
H'0000
TIOCA
TGRA
TGRC
TCNT value
Figure 9.17 Example of Buffer Operation (2)
H'0532
H'0F07
H'0532
H'09FB
H'0F07
Time