R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 179

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

7.2.5
DBSR specifies the repeat size or block size. DBSR is enabled in repeat transfer mode and block
transfer mode and is disabled in normal transfer mode.
Bit
31 to 16 BKSZH31 to
15 to 0
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
DMA Block Size Register (DBSR)
Bit Name
BKSZH16
BKSZ15 to
BKSZ0
BKSZH31
BKSZH23
BKSZ15
BKSZ7
R/W
R/W
R/W
R/W
31
23
15
0
0
0
7
0
Initial
Value
Undefined R/W
Undefined R/W
BKSZH30
BKSZH22
BKSZ14
BKSZ6
R/W
R/W
R/W
R/W
30
22
14
0
0
0
6
0
R/W
BKSZH29
BKSZH21
BKSZ13
BKSZ5
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Description
Specify the repeat size or block size.
When H'0001 is set, the repeat or block size is one byte,
one word, or one longword. When H'0000 is set, it
means the maximum value (refer to table 7.1). While the
DMA is in operation, the setting is fixed.
Indicate the remaining repeat or block size while the
DMA is in operation. The value is decremented by 1
every time data is transferred. When the remaining size
becomes 0, the value of the BKSZH bits is loaded. Set
the same value as the BKSZH bits.
BKSZH28
BKSZH20
BKSZ12
BKSZ4
R/W
R/W
R/W
R/W
28
20
12
0
0
0
4
0
BKSZH27
BKSZH19
BKSZ11
BKSZ3
R/W
R/W
R/W
R/W
27
19
11
0
0
0
3
0
Rev. 3.00 Mar. 14, 2006 Page 141 of 804
BKSZH26
BKSZH18
BKSZ10
BKSZ2
Section 7 DMA Controller (DMAC)
R/W
R/W
R/W
R/W
26
18
10
0
0
0
2
0
BKSZH25
BKSZH17
BKSZ9
BKSZ1
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
REJ09B0104-0300
BKSZH24
BKSZH16
BKSZ8
BKSZ0
R/W
R/W
R/W
R/W
24
16
0
0
8
0
0
0