R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 435

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

12.3.8
SCMR selects smart card interface mode and its format.
Bit
7 to 4
3
2
1
0
Bit
Bit Name
Initial Value
R/W
Bit Name

SDIR
SINV

SMIF
Smart Card Mode Register (SCMR)
—
R
7
1
Initial
Value
All 1
0
0
1
0
—
R
6
1
R/W
R
R/W
R/W
R
R/W
—
R
5
1
Description
Reserved
These are read-only bits and cannot be modified.
Smart Card Data Transfer Direction
Selects the serial/parallel conversion format.
0: Transfer with LSB-first
1: Transfer with MSB-first
This bit is valid only when the 8-bit data format is used for
transmission/reception; when the 7-bit data format is
used, data is always transmitted/received with LSB-first.
Smart Card Data Invert
Inverts the transmit/receive data logic level. This bit does
not affect the logic level of the parity bit. To invert the
parity bit, invert the O/E bit in SMR.
0: TDR contents are transmitted as they are. Receive
1: TDR contents are inverted before being transmitted.
Reserved
This is a read-only bit and cannot be modified.
Smart Card Interface Mode Select
When this bit is set to 1, smart card interface mode is
selected.
0: Normal asynchronous or clocked synchronous mode
1: Smart card interface mode
data is stored as it is in RDR.
Receive data is stored in inverted form in RDR.
—
R
4
1
Section 12 Serial Communication Interface (SCI)
SDIR
R/W
3
0
Rev. 3.00 Mar. 14, 2006 Page 397 of 804
SINV
R/W
2
0
—
R
1
1
REJ09B0104-0300
SMIF
R/W
0
0