R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 593

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
15.3.3
ADCR enables A/D conversion to be started by an external trigger input.
[Legend]
X: Don't care
Bit
7
6
5
4
3
2
1, 0
Bit
Bit Name
Initial Value
R/W
Bit Name
TRGS1
TRGS0
SCANE
SCANS
CKS1
CKS0
A/D Control Register (ADCR)
TRGS1
R/W
7
0
Initial
Value
0
0
0
0
0
0
All 0
TRGS0
R/W
6
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
SCANE
R/W
5
0
Description
Timer Trigger Select 1 and 0
These bits select enabling or disabling of the start of A/D
conversion by a trigger signal.
00: A/D conversion start by external trigger is disabled
01: A/D conversion start by external trigger from TPU is
10: Setting prohibited
11: A/D conversion start by the ADTRG pin is enabled*
Scan Mode
These bits select the A/D conversion operating mode.
0X: Single mode
10: Scan mode. A/D conversion is performed
11: Scan mode. A/D conversion is performed
Clock Select 1 and 0
These bits set the A/D conversion time. Set bits CKS1
and CKS0 only while A/D conversion is stopped (ADST =
0).
00: A/D conversion time = 530 states (max)
01: A/D conversion time = 266 states (max)
10: A/D conversion time = 134 states (max)
11: A/D conversion time = 68 states (max)
Reserved
These are read-only bits and cannot be modified.
enabled
continuously for channels 1 to 4.
continuously for channels 1 to 8.
SCANS
R/W
4
0
CKS1
R/W
3
0
Rev. 3.00 Mar. 14, 2006 Page 555 of 804
CKS0
R/W
2
0
Section 15 A/D Converter
R
1
0
REJ09B0104-0300
R
0
0

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