R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 699
R5F61525
Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5F61525.pdf
(846 pages)
- Current page: 699 of 846
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This LSI has an on-chip clock pulse generator (CPG) that generates the system clock (Iφ),
peripheral module clock (Pφ), and external clock (Bφ).
The clock pulse generator consists of an oscillator, PLL (Phase Locked Loop) circuit, and divider.
Figure 18.1 shows a block diagram of the clock pulse generator.
Clock frequencies can be changed by the PLL circuit and divider in the CPG. Changing the
system clock control register (SCKCR) setting by software can change the clock frequencies.
This LSI supports three types of clocks: a system clock provided to the CPU and bus masters, a
peripheral module clock provided to the peripheral modules, and an external clock provided to the
external bus. These clocks can be specified independently. Note, however, that the frequencies of
the peripheral clock and external clock are lower than that of the system clock.
EXTAL
XTAL
Oscillator
Figure 18.1 Block Diagram of Clock Pulse Generator
Section 18 Clock Pulse Generator
circuit
PLL
EXTAL
8
and 1/8)
Divider
(1/1,
1/2,
1/4,
1/1
1/2
1/4
1/8
1/1
1/2
1/4
1/8
Rev. 3.00 Mar. 14, 2006 Page 661 of 804
1/1
1/2
1/4
1/8
Selector
Selector
Selector
SCKCR
SCKCR
SCKCR
Section 18 Clock Pulse Generator
ICK2 to ICK0
PCK2 to PCK0
BCK2 to BCK0
System clock (I )
(to the CPU and
Peripheral module
clock (P )
(to peripheral modules)
External bus clock (B )
(to the B pin)
bus masters)
REJ09B0104-0300
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