R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 555

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
14.3.3
SSMR selects the MSB first/LSB first, clock polarity, clock phase, and clock rate of synchronous
serial communication.
Bit
7
6
5
4, 3
2
1
0
Bit
Bit Name
Initial Value
R/W
Bit Name
MLS
CPOS
CPHS
CKS2
CKS1
CKS0
SS Mode Register (SSMR)
MLS
R/W
7
0
Initial
Value
0
0
0
All 0
0
0
0
CPOS
R/W
6
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
CPHS
R/W
5
0
Description
MSB First/LSB First Select
Selects that the serial data is transmitted in MSB first or
LSB first.
0: LSB first
1: MSB first
Clock Polarity Select
Selects the SSCK clock polarity.
0: High output in idle mode, and low output in active
1: Low output in idle mode, and high output in active
Clock Phase Select (Only for SSU Mode)
Selects the SSCK clock phase.
0: Data changes at the first edge.
1: Data is latched at the first edge.
Reserved
These bits are always read as 0. The write value should
always be 0.
Transfer Clock Rate Select
Select the transfer clock rate (prescaler division rate)
when an internal clock is selected.
000: Reserved
001: Pφ/4
010: Pφ/8
011: Pφ/16
Section 14 Synchronous Serial Communication Unit (SSU)
mode
mode
R/W
4
0
R/W
3
0
Rev. 3.00 Mar. 14, 2006 Page 517 of 804
100: Pφ/32
101: Pφ/64
110: Pφ/128
111: Pφ/256
CKS2
R/W
2
0
CKS1
R/W
1
0
REJ09B0104-0300
CKS0
R/W
0
0

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