R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 542

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 Controller Area Network (HCAN)
13.8
13.8.1
HCAN operation can be disabled or enabled using the module stop control register. The HCAN
operation is set to be halted initially. Register access is enabled by clearing module stop mode. For
details, refer to section 19, Power-Down Modes.
13.8.2
The HCAN is reset by a power-on reset and a transition to software standby mode. All the
registers are initialized by a reset, however mailboxes (message control (MCx[x])/message data
(MDx[x])) are not initialized. Mailboxes (message control (MCx[x])/message data (MDx[x])) are
initialized after power-on and at this time, their initial values are undefined. Therefore, always
initialize mailboxes after a power-on reset, a transition to software standby mode, or a transition to
module stop mode. After a power-on reset, recovery from software standby mode, or clearing
module stop mode, the reset interrupt flag (IRR0) is automatically set. Since this bit cannot be
masked in the interrupt mask register (IMR), an HCAN interrupt will be initiated immediately
after an HCAN interrupt is enabled by the interrupt controller without clearing the flag. IRR0
should therefore be cleared at initialization.
13.8.3
The bus operation interrupt flag (IRR12) in the interrupt register (IRR) is set by CAN bus
operation in HCAN sleep mode. Therefore, this flag is not used by the HCAN to indicate sleep
mode release. Note that the reset status bit (GSR3) in the general status register (GSR) is set even
in sleep mode.
Rev. 3.00 Mar. 14, 2006 Page 504 of 804
REJ09B0104-0300
Usage Notes
Module Stop Mode Setting
Reset
HCAN Sleep Mode