R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 833

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Item
17.13 Standard Serial
Communication Interface
Specifications for Boot Mode
(4) Receive Data Check
(8) Programming/Erasing State
17.14 Usage Notes
Section 18 Clock Pulse Generator
18.1 Register Description
18.1.1 System Clock Control
Register (SCKCR)
643
647
658,
659
662
Page Revision (See Manual for Details)
Deleted
3. Operating frequency error
Amended
Added
10. To program the flash memory, the program data
15. The contents of some general registers are not
Amended
SCKCR controls Bφ clock output and frequencies of the
system, peripheral module, and external clocks, and
selects the Bφ clock to be output.
Command
H'4C
H'4D
H'4C
H'4D
H'4F
Bit
15
and program must be allocated to addresses
which are higher than those of the external
interrupt vector table and H'FF must be written to
all the system reserved areas in the exception
handling vector table.
saved in a programming/ programming
end/erasing program. When needed, save general
registers in the procedure program.
Command Name
User boot MAT blank check
User MAT blank check
User boot MAT blank check
User MAT blank check
Boot program status inquiry
Bit Name
PSTOP1
Rev. 3.00 Mar. 14, 2006 Page 795 of 804
Description
Bφ Clock Output Enable
Controls Bφ output on PA7.
0: Bφ output
1: Fixed high
X: Fixed high
X: Hi-Z
Normal operation
Software standby mode
Hardware standby mode
Checks the blank data of the user boot MAT
Description
Checks the blank data of the user MAT
Checks whether the contents of the user boot
MAT are blank
Checks whether the contents of the user MAT
are blank
Inquires into the boot program's status
REJ09B0104-0300

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