R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 601

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
15.7
15.7.1
Operation of the A/D converter can be disabled or enabled using the module stop control register.
The initial setting is for operation of the A/D converter to be halted. Register access is enabled by
clearing module stop mode. For details, refer to section 19, Power-Down Modes.
15.7.2
This LSI's analog input is designed so that the conversion accuracy is guaranteed for an input
signal for which the signal source impedance is 5 kΩ or less. This specification is provided to
enable the A/D converter's sample-and-hold circuit input capacitance to be charged within the
sampling time; if the sensor output impedance exceeds 5 kΩ, charging may be insufficient and it
may not be possible to guarantee the A/D conversion accuracy. However, if a large capacitance is
provided externally for conversion in single mode, the input load will essentially comprise only
the internal input resistance of 10 kΩ, and the signal source impedance is ignored. However, since
a low-pass filter effect is obtained in this case, it may not be possible to follow an analog signal
with a large differential coefficient (e.g., 5 mV/µs or greater) (see figure 15.9). When converting a
high-speed analog signal or conversion in scan mode, a low-impedance buffer should be inserted.
Sensor input
Usage Notes
Module Stop Mode Setting
Permissible Signal Source Impedance
Sensor output
impedance
R
Low-pass
filter
C
5 k
0.1 F
Figure 15.9 Example of Analog Input Circuit
This LSI
Cin =
15 pF
Equivalent circuit
of the A/D converter
Rev. 3.00 Mar. 14, 2006 Page 563 of 804
10 k
Section 15 A/D Converter
20 pF
REJ09B0104-0300

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