R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 6
R5F61525
Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5F61525.pdf
(846 pages)
- Current page: 6 of 846
- Download datasheet (6Mb)
The H8SX/1520 Group is a single-chip microcomputer made up of the high-speed internal 32-bit
H8SX CPU as its core, and the peripheral functions required to configure a system. The H8SX
CPU is upward compatible with the H8/300, H8/300H, and H8S CPUs.
Target Users: This manual was written for users who will be using the H8SX/1520 Group in the
Objective:
Notes on reading this manual:
In order to understand the overall functions of the chip
In order to understand the details of the CPU's functions
In order to understand the details of a register when its name is known
Related Manuals:
Rev. 3.00 Mar. 14, 2006 Page vi of xxxviii
Read the manual according to the contents. This manual can be roughly categorized into parts
on the CPU, system control functions, and peripheral functions.
Read the H8SX Family Software Manual.
Read the index that is the final part of the manual to find the page number of the entry on the
register. The addresses, bits, and initial values of the registers are summarized in section 20,
List of Registers.
Examples:
design of application systems. Target users are expected to understand the
fundamentals of electrical circuits, logical circuits, and microcomputers.
This manual was written to explain the hardware functions and electrical
characteristics of the H8SX/1520 Group to the target users.
Refer to the H8SX Family Software Manual for a detailed description of the
instruction set.
Register name:
Bit order:
Number notation:
Signal notation:
Please ensure you have the latest versions of all documents you require.
http://www.renesas.com/
The latest versions of all related manuals are available from our web site.
The following notation is used for cases when the same or a
similar function, e.g. 16-bit timer pulse unit or serial
communication interface, is implemented on more than one
channel:
XXX_N (XXX is the register name and N is the channel
number)
The MSB is on the left and the LSB is on the right.
Binary is B'xxxx, hexadecimal is H'xxxx, decimal is xxxx.
An overbar is added to a low-active signal: xxxx
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