R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 507

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Note:
Bit
3, 2
1
0
*
Bit Name

IRR9
IRR8
Only 1 can be written to clear the flag.
Initial
Value
All 0
0
0
R/W

R
R/(W)*
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Unread Interrupt Flag
Status flag indicating that a receive message has
been overwritten before being read.
[Setting condition]
When UMSR (unread message status register) is
set
[Clearing condition]
Clearing of all bits in UMSR (unread message
status register)
Mailbox Empty Interrupt Flag
Status flag indicating that the next transmit
message can be stored in the mailbox.
[Setting condition]
•
[Clearing condition]
•
When TXPR (transmit wait register) is cleared
by completion of transmission or completion
of transmission abort
Writing 1
(When the CPU is used to clear this flag by
writing 1 while the corresponding interrupt is
enabled, be sure to read the flag after writing
1 to it.)
Section 13 Controller Area Network (HCAN)
Rev. 3.00 Mar. 14, 2006 Page 469 of 804
REJ09B0104-0300