R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 155

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

5.6.4
Table 5.4 shows interrupt response times – the interval between generation of an interrupt request
and execution of the first instruction in the interrupt handling routine. The symbols for execution
states used in table 5.4 are explained in table 5.5.
This LSI is capable of fast word transfer to on-chip memory, so allocating the program area in on-
chip ROM and the stack area in on-chip RAM enables high-speed processing.
Table 5.4
Notes: 1. Two states for an internal interrupt.
Execution State
Interrupt priority decision*
Number of states until executing
instruction ends*
PC, CCR, EXR stacking
Vector fetch
Instruction fetch*
Internal processing*
Total (using on-chip memory)
2. In the case of the MULXS or DIVXS instruction
3. Prefetch after interrupt acceptance or for an instruction in the interrupt handling routine.
4. Internal operation after interrupt acceptance or after vector fetch
5. Not available in this LSI.
6. When setting the SP value to 4n, the interrupt response time is S
Interrupt Response Times
2, the interrupt response time is 2·S
Interrupt Response Times
2
3
4
1
10 to 31
Interrupt
Control
Mode 0
S
K
to 2·S
Normal Mode*
K
*
6
Interrupt
Control
Mode 2
2·S
11 to 31
K
K
.
5
Interrupt
Control
Mode 0
S
10 to 31
K
to 2·S
Advanced Mode
1 to 19 + 2·S
Rev. 3.00 Mar. 14, 2006 Page 117 of 804
K
*
2·S
6
S
3
2
h
Interrupt
Control
Mode 2
2·S
11 to 31
I
K
I
Section 5 Interrupt Controller
K
; when setting to 4n +
11 to 31
Interrupt
Control
Mode 0
2·S
Maximum Mode
K
REJ09B0104-0300
Interrupt
Control
Mode 2
2·S
11 to 31
K
5