R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 497

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

13.3.5
TXPR makes transmit messages stored in mailboxes enter the transmit wait state (CAN bus
arbitration wait).
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Transmit Wait Register (TXPR)
Bit Name
TXPR7
TXPR6
TXPR5
TXPR4
TXPR3
TXPR2
TXPR1

TXPR15
TXPR14
TXPR13
TXPR12
TXPR11
TXPR10
TXPR9
TXPR8
TXPR15
TXPR7
R/W
R/W
15
0
7
0
Initial
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TXPR14
TXPR6
R/W
R/W
14
0
6
0
TXPR13
TXPR5
R/W
R/W
13
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
5
0
TXPR12
TXPR4
Description
These bits set a transmit wait (CAN bus arbitration
wait) for the corresponding mailboxes 1 to 15.
When TXPRn (n = 1 to 15) is set to 1, the
message in mailbox n becomes the transmit wait
state.
[Clearing conditions]
Completion of message transmission
Completion of transmission cancellation
Bit 8 is reserved. This is a read-only bit and cannot
be modified.
R/W
R/W
12
0
4
0
TXPR11
TXPR3
R/W
R/W
Section 13 Controller Area Network (HCAN)
11
0
3
0
Rev. 3.00 Mar. 14, 2006 Page 459 of 804
TXPR10
TXPR2
R/W
R/W
10
0
2
0
TXPR1
TXPR9
R/W
R/W
9
0
1
0
REJ09B0104-0300
TXPR8
R/W
—
R
8
1
0
0