R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 399

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
10.4.5
Figure 10.8 shows a sample procedure for setting up non-overlapping pulse output.
PPG setup
TPU setup
TPU setup
Figure 10.8 Setup Procedure for Non-Overlapping Pulse Output (Example)
Sample Setup Procedure for Non-Overlapping Pulse Output
Set non-overlapping groups
Set counting operation
Select interrupt request
Select TGR functions
Set initial output data
Enable pulse output
Select output trigger
Compare match A?
Non-overlapping
Set TGR values
Set next pulse
Set next pulse
Start counter
pulse output
output data
output data
Yes
No
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
Section 10 Programmable Pulse Generator (PPG)
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10] Set the CST bit in TSTR to 1 to start the
[11] At each TGIA interrupt, set the next
Set TIOR to make TGRA and TGRB
output compare registers (with output
disabled).
Set the pulse output trigger cycle in
TGRB and the non-overlapping margin
in TGRA.
Select the counter clock source with bits
TPSC2 to TPSC0 in TCR. Select the
counter clear source with bits CCLR1
and CCLR0.
Enable the TGIA interrupt in TIER. The
DMAC can also be set up to transfer
data to NDR.
Set the initial output values in PODR.
Set the bits in NDER for the pins to be
used for pulse output to 1.
Select the TPU compare match event to
be used as the pulse output trigger in
PCR.
In PMR, select the groups that will
operate in non-overlapping mode.
Set the next pulse output values in NDR.
TCNT counter.
output values in NDR.
Rev. 3.00 Mar. 14, 2006 Page 361 of 804
REJ09B0104-0300

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