R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 573

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

User operation
User operation
User operation
LSI operation
LSI operation
LSI operation
(MSB first)
(1) When 8-bit data length is selected (SSRDR0 is valid) with CPOS = 0 and CPHS = 0
(2) When 16-bit data length is selected (SSRDR0 and SSRDR1 are valid) with CPOS = 0 and CPHS = 0
(MSB first)
(3) When 32-bit data length is selected (SSRDR0 to SSRDR3 are valid) with CPOS = 0 and CPHS = 0
(LSB first)
(LSB first)
SSCK
RDRF
SSCK
RDRF
SSCK
RDRF
SCS
SCS
SCS
SSI
SSI
SSI
SSI
SSI
Figure 14.7 Example of Reception Operation (SSU Mode)
Dummy-readSSRDR0
Dummy-readSSRDR0
Dummy-read SSRDR0
Bit
Bit
Bit
Bit
Bit
0
7
0
7
0
SSRDR3
SSRDR0
Bit
Bit
Bit
SSTDR0 (LSB first transmission)
to
to
1
1
6
Bit
Bit
Bit
Bit
Bit
2
5
7
0
2
SSRDR1
SSRDR0
1 frame
Bit
Bit
Bit
Bit
Bit
3
3
4
0
7
SSRDR2
SSRDR1
Bit
Bit
Bit
to
to
4
4
3
Bit
Bit
Bit
Bit
Bit
5
5
2
7
0
Section 14 Synchronous Serial Communication Unit (SSU)
Bit
Bit
Bit
Bit
Bit
6
6
0
1
7
RXI interrupt
SSRDR1
SSRDR2
1 frame
generated
Bit
Bit
Bit
to
to
7
7
0
Read SSRDR0
Bit
Bit
Bit
Bit
7
7
0
0
Bit
Bit
Bit
Bit
6
0
7
1
SSRDR0
SSRDR3
RXI interrupt generated
Bit
Bit
Bit
7
to
to
5
2
Rev. 3.00 Mar. 14, 2006 Page 535 of 804
SSRDR0
SSRDR1
Bit
SSTDR0 (MSB first transmission)
Bit
Bit
Bit
Bit
6
4
7
0
3
Bit
Bit
Bit
5
3
4
RXI interrupt generated
1 frame
Bit
Bit
Bit
4
2
5
Bit
Bit
Bit
3
1
6
Bit
Bit
Bit
2
7
0
RXI interrupt
Bit
1
generated
Bit
0
REJ09B0104-0300