R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 526

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 Controller Area Network (HCAN)
Time quanta (tq) is an integer multiple of the number of system clocks, and is determined by the
baud rate prescaler (BRP) as follows. f
tq = 2 × (BPR setting + 1)/f
The following formula is used to calculate the 1-bit time and bit rate.
1-bit time = tq × (3 + TSEG1 + TSEG2)
Bit rate = 1/Bit time
Note:
Example: With a peripheral module clock (Pφ) of 20 MHz, a BRP setting of B'000000, a TSEG1
Bit rate = 20/{2 × (0 + 1) × (3 + 4 + 3)} = 1 Mbps
Table 13.3 Setting Range for TSEG1 and TSEG2 in BCR
Notes: The time quantum values for TSEG1 and TSEG2 are determined by TSEG value + 1.
Rev. 3.00 Mar. 14, 2006 Page 488 of 804
REJ09B0104-0300
TSEG1
(BCR11 to BCR8) 001
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
= f
A BCR value is used for BRP, TSEG1, and TSEG2.
*
f
CLK
CLK
setting of B'0100, and a TSEG2 setting of B'011:
Settable when BRP is not B'000000.
= Pφ (peripheral module clock)
/{2 × (BPR setting + 1) × (3 + TSEG1 + TSEG2)}
No
Yes*
Yes*
Yes*
Yes*
Yes*
Yes*
Yes*
Yes*
Yes*
Yes*
Yes*
Yes*
CLK
010
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
CLK
is the frequency of the peripheral module clock (Pφ).
011
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
TSEG2 (BCR14 to BCR12)
No
100
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
101
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
110
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
111
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes