R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 127
R5F61525
Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5F61525.pdf
(846 pages)
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5.3
The interrupt controller has the following registers.
• Interrupt control register (INTCR)
• CPU priority control register (CPUPCR)
• Interrupt priority registers A to G, I, K to O, Q, and R (IPRA to IPRG, IPRI, IPRK to IPRO,
• IRQ enable register (IER)
• IRQ sense control registers H and L (ISCRH, ISCRL)
• IRQ status register (ISR)
• Software standby release IRQ enable register (SSIER)
5.3.1
INTCR selects the interrupt control mode, and the detected edge for NMI.
Bit
Bit Name
Initial Value
R/W
Bit
7, 6
5
4
IPRQ, and IPRR)
Bit Name
INTM1
INTM0
Register Descriptions
Interrupt Control Register (INTCR)
—
R
7
0
Initial
Value
All 0
0
0
—
R
6
0
INTM1
R/W
R/W
R
R/W
R/W
5
0
Description
Reserved
These are read-only bits and cannot be modified.
Interrupt Control Select Mode 1 and 0
These bits select either of two interrupt control modes
for the interrupt controller.
00: Interrupt control mode 0
01: Setting prohibited.
10: Interrupt control mode 2
11: Setting prohibited.
INTM0
R/W
4
0
Interrupts are controlled by I bit in CCR.
Interrupts are controlled by bits I2 to I0 in EXR, and
IPR.
NMIEG
R/W
3
0
Rev. 3.00 Mar. 14, 2006 Page 89 of 804
—
R
2
0
Section 5 Interrupt Controller
—
R
1
0
REJ09B0104-0300
—
R
0
0
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