R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 540

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 13 Controller Area Network (HCAN)
13.6
The DMAC can be activated by the reception of a message in HCAN mailbox 0. When the
DMAC activation is set and DMAC transfer ends, flags RXPR0 and RFPR0 are automatically
cleared. An interrupt request is not sent to the CPU by a reception interrupt from the HCAN.
Figure 13.15 shows a DMAC transfer flowchart.
Rev. 3.00 Mar. 14, 2006 Page 502 of 804
REJ09B0104-0300
DMAC Interface
DMAC initialization
destination address, transfer count, and
Activation source, source address,
Message reception in HCAN's
DMAC transfer end bit setting
DMAC interrupt flag clearing
DMAC interrupt enable = 1?
RXPR and RFPR clearing
End of DMAC transfer?
DMAC activation
Interrupt to CPU
Figure 13.15 DMAC Transfer Flowchart
mailbox 0
Yes
End
Yes
No
No
: Settings by user
: Processing by hardware

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