R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 409

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Note:
Bit
7
6
5
4 to 0
*
Bit Name
WOVF
RSTE
Only 0 can be written to this bit, to clear the flag.
Initial
Value
0
0
0
All 1
R/W
R/(W)* Watchdog Timer Overflow Flag
R/W
R/W
R
Description
This bit is set when TCNT overflows in watchdog timer
mode. This bit cannot be set in interval timer mode, and
only 0 can be written.
[Setting condition]
[Clearing condition]
Reset Enable
Specifies whether or not this LSI is internally reset if
TCNT overflows during watchdog timer operation.
0: LSI is not reset even if TCNT overflows (Though this
1: LSI is reset if TCNT overflows
Reserved
This bit is always read as 0. The write value should
always be 0.
Reserved
These are read-only bits and cannot be modified.
LSI is not reset, TCNT and TCSR in WDT are reset)
When TCNT overflows (changed from H'FF to H'00)
in watchdog timer mode
Reading RSTCSR when WOVF = 1, and then writing
0 to WOVF
Rev. 3.00 Mar. 14, 2006 Page 371 of 804
Section 11 Watchdog Timer (WDT)
REJ09B0104-0300

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