R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 143

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
5.5
Table 5.2 lists interrupt exception handling sources, vector address offsets, and interrupt priority.
In the default priority order, a lower vector number corresponds to a higher priority. When
interrupt control mode 2 is set, priority levels can be changed by setting the IPR contents. The
priority for interrupt sources allocated to the same level in IPR follows the default priority, that is,
they are fixed.
Table 5.2
Classification Interrupt Source
External pin
WDT
Interrupt Exception Handling Vector Table
Interrupt Sources, Vector Address Offsets, and Interrupt Priority
NMI
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
Reserved for system use
WOVI
Reserved for system use
Vector
Number
7
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
H'001C
Vector
Address
Offset*
H'0100
H'0104
H'0108
H'010C
H'0110
H'0114
H'0118
H'011C
H'0120
H'0124
H'0128
H'012C
H'0130
H'0134
H'0138
H'013C
H'0140
H'0144
H'0148
H'014C
H'0150
H'0154
1
IPR
IPRA14 to IPRA12
IPRA10 to IPRA8
IPRA6 to IPRA4
IPRA2 to IPRA0
IPRB14 to IPRB12
IPRB10 to IPRB8
IPRB6 to IPRB4
IPRB2 to IPRB0
IPRC14 to IPRC12
IPRC10 to IPRC8
IPRC6 to IPRC4
IPRC2 to IPRC0
IPRD14 to IPRE12
IPRD10 to IPRD8
IPRD6 to IPRD4
IPRE10 to IPRE8
Rev. 3.00 Mar. 14, 2006 Page 105 of 804
Section 5 Interrupt Controller
Priority
High
Low
REJ09B0104-0300
DMAC
Activation

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