R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 451

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Table 12.11 shows the states of the SSR status flags and receive data handling when a receive
error is detected. If a receive error is detected, the RDRF flag retains its state before receiving
data. Reception cannot be resumed while a receive error flag is set to 1. Accordingly, clear the
ORER, FER, PER, and RDRF bits to 0 before resuming reception. Figure 12.9 shows a sample
flowchart for serial data reception.
Table 12.11 SSR Status Flags and Receive Data Handling
Note:
RDRF*
1
0
0
1
1
0
1
*
ORER
1
0
0
1
1
0
1
The RDRF flag retains the state it had before data reception.
SSR Status Flag
FER
0
1
0
1
0
1
1
PER
0
0
1
0
1
1
1
Receive Data
Transferred to RDR Parity error
Lost
Transferred to RDR Framing error
Lost
Lost
Transferred to RDR Framing error + parity error
Lost
Section 12 Serial Communication Interface (SCI)
Rev. 3.00 Mar. 14, 2006 Page 413 of 804
Receive Error Type
Overrun error
Overrun error + framing error
Overrun error + parity error
Overrun error + framing error +
parity error
REJ09B0104-0300

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