R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 19

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

14.6 Usage Note......................................................................................................................... 546
Section 15 A/D Converter..................................................................................547
15.1 Features.............................................................................................................................. 547
15.2 Input/Output Pins ............................................................................................................... 550
15.3 Register Descriptions ......................................................................................................... 551
15.4 Operation ........................................................................................................................... 556
15.5 Interrupt Source ................................................................................................................. 561
15.6 A/D Conversion Accuracy Definitions .............................................................................. 561
15.7 Usage Notes ....................................................................................................................... 563
Section 16 RAM ................................................................................................567
Section 17 Flash Memory (0.18-µm F-ZTAT Version) ....................................569
17.1 Features.............................................................................................................................. 569
17.2 Mode Transition Diagram.................................................................................................. 571
17.3 Memory MAT Configuration............................................................................................. 573
17.4 Block Structure .................................................................................................................. 574
17.5 Programming/Erasing Interface ......................................................................................... 575
17.6 Input/Output Pins ............................................................................................................... 577
17.7 Register Descriptions ......................................................................................................... 578
14.6.1 Setting of Module Stop Mode............................................................................... 546
14.6.2 Notes on Clearing Module Stop Mode ................................................................. 546
15.3.1 A/D Data Registers A to H (ADDRA to ADDRH) .............................................. 552
15.3.2 A/D Control/Status Register (ADCSR) ................................................................ 553
15.3.3 A/D Control Register (ADCR) ............................................................................. 555
15.4.1 Single Mode.......................................................................................................... 556
15.4.2 Scan Mode ............................................................................................................ 557
15.4.3 Input Sampling and A/D Conversion Time .......................................................... 559
15.4.4 External Trigger Input Timing.............................................................................. 560
15.7.1 Module Stop Mode Setting ................................................................................... 563
15.7.2 Permissible Signal Source Impedance .................................................................. 563
15.7.3 Influences on Absolute Accuracy ......................................................................... 564
15.7.4 Setting Range of Analog Power Supply and Other Pins ....................................... 564
15.7.5 Notes on Board Design ......................................................................................... 564
15.7.6 Notes on Noise Countermeasures ......................................................................... 565
15.7.7 A/D Input Hold Function in Software Standby Mode .......................................... 566
17.7.1 Programming/Erasing Interface Registers ............................................................ 579
17.7.2 Programming/Erasing Interface Parameters ......................................................... 586
17.7.3 RAM Emulation Register (RAMER).................................................................... 598
Rev. 3.00 Mar. 14, 2006 Page xix of xxxviii