R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 714
R5F61525
Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5F61525.pdf
(846 pages)
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Section 19 Power-Down Modes
• MSTPCRA
Note:
Rev. 3.00 Mar. 14, 2006 Page 676 of 804
REJ09B0104-0300
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
*
Bit Name
ACSE
MSTPA14 0
MSTPA13 0
MSTPA12 0
MSTPA11
MSTPA10
MSTPA9
MSTPA8
MSTPA7
MSTPA6
MSTPA5
MSTPA4
MSTPA3
MSTPA2
MSTPA1
MSTPA0
Supported only by the H8SX/1527.
Initial
Value
0
1
1
1
1
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Module
All-Module-Clock-Stop Mode Enable
Enables/disables all-module-clock-stop mode for
reducing current consumption by stopping the bus
controller and I/O ports operations when the CPU
executes the SLEEP instruction after module stop mode
has been set for all the on-chip peripheral modules
controlled by MSTPCR.
0: All-module-clock-stop mode disabled
1: All-module-clock-stop mode enabled
Reserved
These bits are always read as 0. The write value should
always be 0.
DMA controller (DMAC)
Reserved
These bits are always read as 0. The write value should
always be 0.
Reserved
These bits are always read as 1. The write value should
always be 1.
A/D converter (unit 1)
A/D converter (unit 0)
Reserved
These bits are always read as 1. The write value should
always be 1.
16-bit timer pulse unit (TPU channels 11 to 6)
16-bit timer pulse unit (TPU channels 5 to 0)*
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